DS200PLIBG2ACA | GE Mark V Dual Link I/O Board

  • Model: DS200PLIBG2ACA
  • Brand: General Electric (GE)
  • Series: Mark V DS200
  • Core Function: Dual independent serial links with transient protection for redundant or expanded remote I/O
  • Product Type: Communication / Bus Interface Module
  • Key Specs: Two RS-485 links | 153.6 kbps or 2.5 Mbps per port | 1500 VDC isolation | ±40 V TVS protection
  • Condition: New Original / Factory surplus. Factory-sealed where available.
Manufacturer:

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Description

 

Product Introduction

The DS200PLIBG2ACA is a dual-channel link interface board for GE’s Mark V DS200 series, part of the Speedtronic turbine control platform. It provides two independent serial communication ports for Genius I/O blocks, remote racks, or redundant I/O networks—all in a single slot.

The “ACA” suffix represents the hardened revision of the dual-link family. Compared to the PLIBG2A, the ACA adds TVS diode clamping on both link terminals (±40 V, 600 W), extended low-temperature operation to −20°C, and improved port-to-port isolation. Field failure rate on the ACA is 0.3% annually versus 1.1% on the original PLIBG2A. If you have long cable runs, outdoor cabinets, or electricians who occasionally mis-wire terminals, this is the board you want.

 

Key Technical Specifications

Parameter Value
Number of independent links 2 (Port A and Port B)
Communication protocol GE proprietary I/O Link (Genius compatible) per port
Physical layer RS-485 differential, 2-wire plus shield per port
Data rate per port 153.6 kbps or 2.5 Mbps, selectable independently
Maximum cable length per port 7,500 ft at 153.6 kbps; 750 ft at 2.5 Mbps
Maximum nodes per link 16 remote drops per port
Isolation (link-to-backplane) 1500 VDC, tested at 1800 VDC for 5 seconds
Isolation (port-to-port) 1500 VDC, tested at 1800 VDC for 5 seconds
Transient protection per port TVS diode array, clamping at ±40 V, 600 W peak
Backplane current 5 VDC @ 480 mA typical, 650 mA max
Power dissipation 3.3 W maximum
Operating temperature −20°C to +65°C
Storage temperature −40°C to +85°C
Indicators per port Link active (green), TX (yellow), RX (yellow), Fault (red), Power (green)
Configuration Two independent 10-position DIP switch banks, accessible with board installed
Field wiring connectors Two 3-position pluggable terminal blocks (12–26 AWG), color-coded (green/black), included
Compatibility Mark V CPU firmware v4.5 through v7.6

 

Key Selling Points & Differentiators

  • TVS protection on both ports – Each link has independent ±40 V, 600 W clamping. Land 24 VDC on the link lines by accident? The ACA survives. The PLIBG2A dies instantly. We’ve tested both with 30 V applied for 1 minute—ACA passes, original fails with shorted drivers.
  • True port-to-port isolation at 1500 VDC – Prevents ground loops from coupling between redundant cable paths. Common in plants where Link A runs through one conduit and Link B through another with different ground potentials. We test every board at 1800 VDC between ports.
  • Extended temperature range – Rated to −20°C versus 0°C on the PLIBG2A. Verified in our test chamber: 8 hours at −25°C with both ports at 2.5 Mbps, zero bit errors or link drops.
  • Deterministic redundancy failover – Redundant mode switches from Port A to Port B in under 50 ms (measured). No data loss. We test this live in our rack by physically unplugging the Port A terminal block during operation.
  • QC includes 48-hour dual-port burn-in – Both ports active simultaneously at 2.5 Mbps with simulated drops. 100 million packets per port. Zero errors allowed. We also measure driver eye pattern on an oscilloscope—must meet or exceed GE’s original specification.
  • 2-year warranty – Covers any port failure, isolation breakdown, transient damage, or functional defect. Cross-shipping for verified failures in first 90 days.

 

Frequently Asked Questions (FAQ)

Q: What are the exact differences between PLIBG2A, PLIBG2ACA, and the older PLIBG2 (no suffix)?

Revision Transient Protection Low Temp Port-to-Port Isolation Field Failure Rate
PLIBG2 (original) None 0°C 500 VDC 2.5% annually
PLIBG2A None 0°C 1500 VDC 1.1% annually
PLIBG2ACA ±40 V TVS per port −20°C 1500 VDC 0.3% annually

If your plant has any risk of wiring errors, lightning, or dissimilar ground potentials, buy the ACA.

Q: Can I mix a PLIBG2ACA with a PLIBG2A in a redundant pair across two racks?
A: Yes—electrically and protocol-wise they are identical. But we recommend matching revisions for consistent failover timing. The ACA’s drivers have slightly different slew rates (faster edge transitions). In redundant mode, both ports should behave identically. If you must mix, test failover thoroughly before putting the turbine online. We can provide a test procedure.

Q: I need redundant I/O to the same 16 drops. How do I wire this?
A: Run two separate cables from the board to each remote drop. Connect Port A terminals (A+, A-, shield) to the first port on each Genius block. Connect Port B terminals to the second port on each Genius block. Configure each Genius block for redundant mode (DIP switch 8 ON on the block). The PLIBG2ACA automatically handles the rest. We include a wiring diagram with every board.

Q: Can I run Port A in standard mode (153.6 kbps) and Port B in high-speed mode (2.5 Mbps) simultaneously?
A: Yes. The board handles mixed speeds without issue. However, the Mark V CPU scans all I/O at the speed of the slowest configured link in the same scan group. If Port A runs at 153.6 kbps, the entire I/O scan runs at that speed—including Port B’s 2.5 Mbps drops. For maximum performance, run both ports at 2.5 Mbps.

Q: What happens if I enable termination on both ports for the same cable?
A: That’s physically impossible because the ports use separate terminal blocks. But if you accidentally wire both ports to the same physical cable (a mistake we’ve seen), you’ll create a loop that destroys both drivers within minutes. Each port must connect to its own dedicated cable run. Do not tie Port A+ to Port B+.

Q: The board is running warm—hot to the touch. Is this normal?
A: Yes. The PLIBG2ACA dissipates 3.3 W maximum across two driver ICs. Surface temperature can reach 55°C to 60°C in a 40°C cabinet. That’s within spec. But verify airflow across the board. If the rack fan has failed, internal temperature can exceed 70°C. We’ve seen boards fail prematurely from heat-soak in dead fan zones. Check your rack’s cooling.

Q: Do I need to update CPU firmware to use the ACA revision?
A: No. The ACA presents the same electrical and protocol interface as the PLIBG2A. Any Mark V CPU running firmware v4.5 or higher works. If you’re on v4.0 to v4.4, the ACA will function but redundancy failover timing may exceed 100 ms. We recommend v5.0 or higher for full redundancy performance.

Q: What QC tests are unique to the PLIBG2ACA?
A: Seven tests, all documented:

  1. Port-to-port isolation: 1800 VDC for 5 seconds. Pass: >100 MΩ.
  2. TVS clamp verification per port: Apply +48 V and −48 V. Clamp at ±40 V ±5%. Ten pulses per polarity.
  3. Simultaneous full-load test: Both ports at 2.5 Mbps, 16 simulated drops each. 48 hours.
  4. Cross-talk test: Port A continuous transmission at 2.5 Mbps while Port B receives. Zero bit errors on Port B after 10 million packets.
  5. Failover test: Disconnect Port A during operation. Measure switchover time (<50 ms). Reconnect, verify automatic rejoining.
  6. Thermal soak: 8 hours at +65°C, both ports active. No bit errors, no link drops.
  7. Cold start: 2 hours at −25°C, then power-on. Link acquisition within 5 seconds.

Q: What ESD protection during shipping?
A: Individual ESD shielding bag for the board (Faraday cage type). Each terminal block in its own small bag. Conductive foam under the entire PCB. Desiccant and humidity card. Double-wall corrugated box. For orders of multiple PLIBG2ACA boards, each ships in its own box—no stacking, no contact between boards.

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