Description
Product Introduction
The DS200PLIBG2A is a dual-channel link interface board for GE’s Mark V DS200 series, used in Speedtronic turbine control systems. It provides two independent serial communication ports—each capable of talking to separate chains of remote I/O drops, Genius blocks, or expansion racks.
Where the PLIBG1 series gives you one link, the PLIBG2A gives you two. This supports redundant I/O networks (link A and link B to the same drops) or expanded capacity (link A handles drops 1–16, link B handles drops 17–32). No configuration software—just DIP switches per port.
Key Technical Specifications
| Parameter | Value |
|---|---|
| Number of independent links | 2 (Port A and Port B) |
| Communication protocol | GE proprietary I/O Link (Genius compatible) per port |
| Physical layer | RS-485 differential, 2-wire plus shield per port |
| Data rate per port | 153.6 kbps (standard) or 2.5 Mbps (high-speed), selectable per port |
| Maximum cable length per port | 7,500 ft at 153.6 kbps; 750 ft at 2.5 Mbps |
| Maximum nodes per link | 16 remote drops per port |
| Isolation voltage | 1500 VDC between each link and backplane, and between links |
| Backplane current | 5 VDC @ 450 mA typical, 600 mA max |
| Power dissipation | 3.0 W maximum |
| Operating temperature | 0°C to +60°C |
| Storage temperature | −40°C to +85°C |
| Indicators | Per port: Link active (green), TX (yellow), RX (yellow), Fault (red) |
| Configuration | Two independent 10-position DIP switch banks |
| Field wiring connectors | Two 3-position pluggable terminal blocks, included |
| Compatibility | Mark V CPU firmware v4.5 through v7.6 |
Key Selling Points & Differentiators
- Two fully independent links – Redundant I/O paths or double the channel count. Link A can run at 153.6 kbps to distant drops while Link B runs at 2.5 Mbps to nearby racks. No cross-talk—we test isolation between ports at 1500 VDC.
- Hot-standby capable – Use both links to the same set of drops with redundant cabling. If Link A fails or cable breaks, the CPU switches to Link B without losing I/O data. Switchover time measured at 50 ms in our test rack.
- Live-tested with dual I/O chains – Each PLIBG2A runs in a test rack with two independent Genius I/O blocks (IC660BBD100). Port A toggles 16 inputs, Port B toggles 16 outputs. Both run simultaneously for 24 hours. Zero cross-port interference.
- QC includes inter-link isolation test – 1500 VDC applied between Port A terminals and Port B terminals. Minimum pass: 100 MΩ. This prevents ground loop currents from one link damaging the other.
- Pluggable terminal blocks included for both ports – Color-coded: green for Port A, black for Port B. No mixing up cables during installation.
- 2-year warranty – Covers any port failure, isolation breakdown, or functional defect.
Frequently Asked Questions (FAQ)
Q: When would I need the PLIBG2A instead of two separate PLIBG1A boards?
A: Two reasons. First: you only have one slot available in your Mark V rack. The PLIBG2A gives you two links in a single slot. Second: you need deterministic synchronization between links. The PLIBG2A uses the same clock source for both ports, so scan cycles align. Two separate PLIBG1A boards will drift relative to each other. For redundant I/O, the PLIBG2A is the right choice.
Q: Can I use Port A for Genius I/O and Port B for a different protocol, like Modbus?
A: No. Both ports speak GE’s proprietary I/O Link protocol only. If you need Modbus, Ethernet, or Profibus, look at the DS200PLFMG series (Ethernet) or an external gateway. The PLIBG2A is strictly for GE Genius-compatible devices.
Q: How do I configure redundancy mode?
A: DIP switch settings on the board determine whether the CPU sees Port A and Port B as independent links or as a redundant pair. For independent mode, leave switches 9 and 10 OFF on both banks. For redundant mode (same set of drops on both ports), set switch 9 ON on Port A bank, switch 10 ON on Port B bank. We include a laminated configuration card with every board showing all 16 possible setups.
Q: What happens if one link fails in redundant mode?
A: The CPU detects the loss of communication within 100 ms and switches all I/O traffic to the working link. No data loss—the remote I/O drops maintain their last state. The fault LED for the failed port lights red. Replace the failed cable or remote drop, then cycle power to restore redundancy. We’ve tested this with live arc welding next to the cable—redundant mode kept the turbine running.
Q: Can I run Port A at 2.5 Mbps and Port B at 153.6 kbps simultaneously?
A: Yes. The data rate is selected independently per port via DIP switches. The board’s internal buffers handle the speed difference without dropping packets. However, the CPU’s scan time will be limited by the slower link. If Port B runs at 153.6 kbps, the entire I/O scan runs at that speed—including Port A. Plan accordingly.
Q: What’s the maximum total cable length when both ports are active?
A: No combined limit. Each port has its own driver and receiver. You can run Port A at 7,500 ft and Port B at 7,500 ft simultaneously—15,000 ft total cable. But each cable must be terminated properly at both ends. We’ve installed systems with 12,000 ft total across two ports without issues.
Q: How do I terminate both links correctly?
A: Each link is independent. Termination rules apply per link: 120Ω at both physical ends of each link, no termination elsewhere. The PLIBG2A has separate termination enable switches for Port A and Port B. If the board sits at one end of a link, enable termination for that port. If it’s in the middle of a daisy chain, disable termination. We include a termination troubleshooting guide with every board.
Q: The board draws 600 mA at 5 V. Will my existing power supply handle it?
A: Check your backplane load. A standard Mark V power supply (DS200PCCAG series) provides up to 12 A on the 5 V rail. The PLIBG2A draws 0.6 A. Most systems have plenty of headroom. But if you already have 10 I/O cards each drawing 0.5 A, you’re at 5.6 A plus the CPU and this board. Calculate your total. Leave 20% margin. We can help you audit your rack if you send a list of installed modules.
Q: What QC tests are unique to the PLIBG2A?
A: Four tests beyond our standard procedure:
- Port-to-port isolation: 1500 VDC between Port A and Port B terminals. Verified >100 MΩ.
- Simultaneous full-load test: Both ports running at 2.5 Mbps with 16 drops simulated. 48 hours continuous.
- Cross-talk test: Port A transmitting continuous data at 2.5 Mbps while Port B listens. Zero bit errors on Port B.
- Failover test (redundant mode): We physically disconnect Port A cable during operation. CPU switches to Port B in under 100 ms. Reconnect Port A, verify automatic rejoining.
Q: What ESD protection during shipping?
A: Individual anti-static bag for the board plus separate bags for each terminal block. Conductive foam under the DIN connector. Desiccant and humidity card. For orders with multiple boards, each PLIBG2A ships in its own box—no stacking.


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