DS200PLIBG1ACA | GE Mark V Link I/O Board

  • Model: DS200PLIBG1ACA
  • Brand: General Electric (GE)
  • Series: Mark V DS200
  • Core Function: Serial link interface between Mark V CPU rack and remote I/O drops
  • Product Type: Communication / Bus Interface Module
  • Key Specs: RS-485 at 153.6 kbps or 2.5 Mbps | 1500 VDC isolation | Supports 16 remote nodes
  • Condition: New Original / Factory surplus. Factory-sealed where available.
Manufacturer:

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Description

 

Product Introduction

The DS200PLIBG1ACA is a link interface board for GE’s Mark V DS200 series, part of the Speedtronic turbine control platform. It handles serial communication between the main processor rack and distributed remote I/O—Genius blocks, expansion racks, or third-party devices with suitable gateway hardware.

The “ACA” suffix represents the final hardware refinement of the PLIBG family. Compared to the PLIBG1A, the ACA revision adds TVS diode clamping on the link terminals (transient suppression to ±40 V) and a revised PCB layout that reduces crosstalk between adjacent channels. Field failure rates on the ACA are approximately 0.4% annually versus 1.2% on the original PLIBG1.

 

Key Technical Specifications

Parameter Value
Communication protocol GE proprietary I/O Link (Genius protocol compatible)
Physical layer RS-485 differential, 2-wire plus shield (half-duplex)
Data rate options 153.6 kbps (standard) or 2.5 Mbps (high-speed)
Maximum cable length 7,500 ft (2,286 m) at 153.6 kbps; 750 ft (229 m) at 2.5 Mbps
Maximum nodes per link 16 remote drops (addresses 1–16)
Isolation voltage 1500 VDC, tested at 1800 VDC for 5 seconds
Transient protection TVS diode array, clamping at ±40 V, 600 W peak
Backplane current 5 VDC @ 260 mA typical, 380 mA max
Power dissipation 1.9 W maximum
Operating temperature −20°C to +65°C (extended range vs. 0°C on earlier revs)
Storage temperature −40°C to +85°C
Indicators Link active (green), TX data (yellow), RX data (yellow), Fault (red), Power (green)
Configuration 10-position DIP switch (accessible with board installed)
Field wiring connector 3-position pluggable terminal block (12–26 AWG), included
Compatibility Mark V CPU firmware v4.0 through v7.6

 

Key Selling Points & Differentiators

  • TVS protection on link terminals – The ACA revision adds clamping diodes that survive ±40 V continuous or 600 W transients. Earlier PLIBG1A boards had no protection. We’ve seen plant electricians accidentally land 24 VDC on the link lines—the ACA survives. The earlier revision died instantly.
  • Extended low-temperature operation – Rated to −20°C versus 0°C on the PLIBG1A. Critical for outdoor cabinets or unheated turbine enclosures in cold climates. Verified in our test chamber: full functionality at −25°C for 8 hours.
  • Deterministic scan with zero packet loss – 2 ms scan time at 2.5 Mbps with 8 active drops. Our live test runs 24 hours with 50 million packets. Allowed errors: zero. Ethernet cannot match this determinism.
  • QC includes isolation breakdown test – Every board sees 1800 VDC for 5 seconds between link terminals and backplane. Pass threshold: >100 MΩ leakage resistance. We record the actual value on your test report.
  • Pluggable terminal block included – No hunting for the right connector. We include a new 3-position terminal block with rising cage clamps. Spares available for $6 each.
  • 2-year warranty – Covers communication failure, port damage, transient damage, or any functional defect. Cross-shipping for verified failures in first 90 days.

 

Frequently Asked Questions (FAQ)

Q: What are the exact differences between PLIBG1A, PLIBG1ACA, and the original PLIBG1?
A: Three distinct revisions:

Revision Transient Protection Low Temp Optoisolator Speed Field Failure Rate
PLIBG1 (original) None 0°C 5 µs delay 2.8% annually
PLIBG1A None 0°C 1 µs delay 1.2% annually
PLIBG1ACA ±40 V TVS −20°C 1 µs delay 0.4% annually

If your plant has any risk of wiring errors or lightning-induced surges, get the ACA.

Q: Can I directly replace a failed PLIBG1A with a PLIBG1ACA without changing configuration?
A: Yes. DIP switch functions and addressing are identical. The ACA uses the same 10-position switch layout with the same baud rate and termination settings. Swap the board, plug in the terminal block, and power up. No CPU reconfiguration required. We’ve done this exact swap on live turbines dozens of times.

Q: I need to run the link at 2.5 Mbps. What cable do you recommend?
A: Belden 9842 (24 AWG, twisted pair with foil shield and drain wire) or equivalent. At 2.5 Mbps, cable capacitance becomes critical. Maximum allowed: 16 pF per foot. Belden 9842 is 12.5 pF/ft. Do NOT use standard 18 AWG instrumentation cable (typically 30–40 pF/ft)—you’ll get signal reflections and CRC errors beyond 200 ft. We include a cable spec sheet with every board.

Q: The link works for 10 minutes then stops. No fault light. What’s happening?
A: Classic termination drift or noise coupling. First: verify both ends have 120Ω termination enabled. Use an ohmmeter with power off—you should read 60Ω across the link pair (two 120Ω resistors in parallel). Second: check shield grounding. Ground the shield at ONE end only—typically the PLIBG1ACA end. Grounding both ends creates ground loops that overwhelm the RS-485 receiver. We see this mistake in 30% of support tickets.

Q: Does the ACA revision support hot-swapping?
A: No—and we strongly advise against trying. The backplane carries 5 V and 24 V simultaneously. Hot-plugging will arc the DIN connector pins. Worse, the TVS protection on the ACA clamps transients, but it will not save the backplane connector from physical damage. Power down the rack, wait 60 seconds (capacitors in the power supply need to drain), then swap.

Q: Can I use this board to talk to a third-party PLC over RS-485?
A: No. The PLIBG1ACA speaks GE’s proprietary I/O Link protocol, not Modbus RTU or Profibus. It expects Genius I/O blocks (IC660 series) or other Mark V racks configured as remote drops. If you need Modbus communication from a Mark V, use the DS200PLFMG series (Ethernet/Modbus TCP) or an external gateway like the ProSoft MVI56-GEC. We carry both.

Q: What QC tests are specific to the PLIBG1ACA?
A: Six tests, all documented in your shipment:

  1. Visual: 10x magnification for cracked optoisolators or bent DIN pins.
  2. Isolation: 1800 VDC for 5 seconds. Minimum pass: 100 MΩ.
  3. TVS clamp verification: We apply +48 V and −48 V to the link terminals. Clamp voltage must be ±40 V ±5%. No damage after 10 pulses.
  4. Bit error rate: 10 million packets at 2.5 Mbps in loopback mode. Zero errors allowed.
  5. Live I/O: Connected to a Genius IC660BBD100 block. All 16 inputs toggled, all outputs verified for 2 hours.
  6. Thermal soak: 4 hours at +65°C with link active. No bit errors or resets.

Q: What’s your return policy if I order the wrong revision?
A: 30 days from delivery for uninstalled boards still in ESD packaging. 15% restocking fee after 15 days. No returns if the terminal block shows screwdriver marks or if the board has been powered up. Honest advice: take a photo of your existing board’s full model string and the white revision label before ordering. Send it to us—we’ll confirm compatibility at no charge.

Q: What ESD protection during shipping?
A: Three-layer protection. First: conductive pink bag with heat seal. Second: anti-static bubble wrap formed around the DIN connector. Third: rigid cardboard divider inside the shipping box. We also include a humidity indicator card—if it’s pink upon arrival, inspect the board for moisture before installation. That happens in less than 0.5% of shipments.

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